
The Endace® DAG® 3.7T Network Monitoring Interface Card has been optimized for monitoring and interception with precision timestamping capability on up to sixteen T1/E1 network links.
Supported protocols include raw data (unmapped/ unframed), HDLC and ATM over as many as 512 sub-channels, channels and hyper-channels. The DAG 3.7T also supports Inverse Multiplex ATM (IMA) link aggregation, AAL2 and AAL5 segmentation and reassembly, and frame (HDLC), cell (ATM) and packet (AAL2/5) filtering based on user-defined filter rules. An onboard Intel® XScale™ processor provides the means to pre-process data prior to presentation to the monitoring software (or prior to transmission over a T1/E1 link)
With the power to see all traffic on these TDM network links, the DAG 3.7T enables network operators to develop solutions that inspect all traffic at the network edge for security threats, and precisely measure network performance and latency to improve end user’s experiences. This is particularly useful in mobile network backhaul links.
The sixteen ‘RJ45’ sockets (one for each E1/T1/J1 link) are housed in an attached POD. The POD is connected to the DAG 3.7T via a cable terminated at each end with a high-density 68-pin VHDCI connector.
The DAG 3.7T provides two methods of attaching the pod. The POD may be externally rack-mounted and attached to the PCI back-plate on the DAG 3.7T using an external cable. Alternatively, the POD may be mounted in a 5 ¼” drive bay inside the system chassis and attached to an internal VHDCI connector on the DAG 3.7T. An unshielded ribbon cable for internal mounting is included as standard. An external shielded cable is available for purchase separately.
| Physical Interface | E1 (2.048Mbps), T1/J1 (1.544Mbps), 16 full duplex ports, ‘RJ45’/8P8C connectors in external pod |
| Electrical Interface | Programmable line termination: High impedance/ 120/100/750ohm, Built-in lighting strike, ESD and AC-fault protection.(1) |
| Suported Encapsulations | Up to 512 channel configurations distributed over
grouped/individual fractional/full links RAW E1/T1/J1(2) – 24, 31 and 32 timeslot frames HDLC(3) – Supported channel sizes (Kbps): 8, 16, 32, 56, 64, 128, 192, 256… 2048 ATM(4) - Supported channel sizes (Kbps): 64, 128, 192, 256…2048 IMA(5) – 1 to 8 IMA links AAL2 and AAL5(6) – Segmentation and Reassembly |
| Time Synchronization | External: ‘RJ45’ connector for RS-422 PPS Signal
from GPS or CDMA receiver Internal: Host PC clock. Also able to synchronize with other DAG cards. |
| Packet Timestamping | 60ns clock resolution |
| PCI Interface | PCI 32-bit 33MHz 3V and 5V signaling |
| Minimum Systems Requirements | LINUX® version 2.4.x, 2.6.x (32-bit and 64-bit)
FreeBSD 4.x, 5.x, 6.x (32-bit) or Windows®
XP/Windows Server™ 2000 (32-bit) / 2003 (32-bit
and 64-bit) x86 processor 1GHz or better, 1 GB RAM, 1 GB disk space for tools installation One free 32-bit or 64-bit 33/66Mhz PCI slot. |
| Power Requirements | Less than 10W |
| Operating Temperature | 0 to 55 deg C |
| Operating Humidity | 5 to 95% non condensing |
| Physical Dimensions | Full height, half length PCI2.2 Height 106.7mm (4.2”) Length 175 mm (6.88“) |
| *This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. | |
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Dag 3.7T Download datasheet PDF |